1. Field of the Invention
The present invention generally relates to semiconductor chip laminated bodies. More specifically, the present invention relates to a semiconductor chip laminated body where semiconductor chips are laminated.
2. Description of the Related Art
Research and development of a high density mounting technology of semiconductor devices has been progressing in order to correspond to needs such as making a portable information device or a small sized electronic device having a high function and a small size. In this technology, a function of a wafer level package (WLP) technique has been important. In the WLP technique, a package is manufactured in a state where a size of a semiconductor wafer is maintained. The semiconductor wafer is cut into pieces of semiconductor chip size packages (CSPs). A single CSP or combined CSPs, as a new package, is or are installed in an application device. Due to development of recent contents technology and requirements of large capacity of a memory, a laminating technology, of a chip, which is a part of the CSP, has been widely used. By the laminating technology of the chip, plural semiconductor chips having reliabilities are laminated so that a new package is formed.
Japanese Laid-Open Patent Application Publication No. 2000-340594 with respect to chip laminating discusses an example of laminating of semiconductor chips. However, in the technology discussed in Japanese Laid-Open Patent Application Publication No. 2000-340694, a complex manufacturing process is required for making outside connection on a side surface of the semiconductor chip after the wafer is diced. For example, a complex manufacturing process is required where an anisotropic conductive film or a flexible circuit board is used or an insulation film and a conductive film are laminated after multiple semiconductor chips are laminated. In addition, in another example of laminating of the semiconductor chips discussed in Japanese Patent No. 3895768 and shown in FIG. 1, for example, after the semiconductor chip is diced, a complex process where nitride is sputtered in order to insulate side surfaces 12 of semiconductor chips 11 is required. Thus, a manufacturing process of chip laminating is complex and thereby product quality is influenced.